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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
August 2008
SG5851A Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Features
Green-Mode PWM Supports the "Blue Angel" Standard Low Startup Current: 9A Low Operating Current: 3mA Leading-Edge Blanking Constant Output Power Limit Universal Input Built-in Synchronized Slope Compensation Current Mode Operation Cycle-by-cycle Current Limiting Under-Voltage Lockout (UVLO) Programmable PWM Frequency with Frequency Hopping VDD Over-Voltage Protection (Auto Restart) Gate Output Voltage Clamped at 17V Low Cost Few External Components Required
Description
This highly integrated PWM controller provides several enhancements designed to meet the low standby-power needs of low-power SMPS. To minimize standby power consumption, the proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. This green-mode function enables the power supply to meet power conservation requirements. The BiCMOS fabrication process enables reducing the startup current to 9A and the operating current to 3mA. To further improve power conservation, a large startup resistance can be used. Built-in synchronized slope compensation ensures the stability of peak-currentmode control. Proprietary internal compensation provides a constant output power limit over a universal AC input range (90VAC to 264VAC). Pulse-by-pulse current limiting ensures safe operation even during short circuits. To protect the external power MOSFET from being damaged by supply over voltage, the output driver is clamped at 17V. SG5851A controllers, available in an SOP package, can be used to improve the performance and reduce the production cost of power supplies.
Applications
Power Adaptors Open-Frame SMPS
Ordering Information
Part Number
SG5851ASY SG5851ADY
Operating Temperature Range
-40C to +105C -40C to +105C
Package
8-pin Small Outline Package (SOP) 8-pin Dual in-line Package (DIP)
Eco Status
Green Green
Packing Method
Tape & Reel Tube
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
www.fairchildsemi.com
SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Application Diagram
10
SG5851A
Figure 1.
Typical Application
Block Diagram
Figure 2. Function Block Diagram
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0 www.fairchildsemi.com 2
SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Marking Information F- Fairchild logo Z- Plant code X- 1 digit year code Y- 1 digit week code TT: 2 digits die run code T: Package type (S=SOP, D=DIP) P: Y: Green compound M: Manufacture flow code
Figure 3. Marking Information
5851A TPM
Pin Configuration
GA TE VDD SENSE NC
8
7
6
5
1
GN D
2
FB
3
VDD
4
RI
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
1 2 3
Name
GND FB VDD
Description
Ground Feedback Power Supply Reference Setting. A resistor connected from the RI pin to ground generates a constant current source used to charge an internal capacitor and determine the switching frequency. Increasing the resistance reduces the amplitude of the current source and reduces the switching frequency. A 95k resistor, RI, results in a 13A constant current, II, and a 70kHz switching frequency. No Connection Current Sense. This pin senses the voltage across a resistor. When the voltage reaches the internal threshold, PWM output is disabled. This activates over-current protection. This pin also provides current amplitude information for current-mode control. Power Supply Driver Output. The totem-pole output driver for driving the power MOSFET.
4
RI
5 6 7 8
NC SENSE VDD GATE
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltage, are given with respect to GND pin. Stresses beyond those listed under "absolute maximum ratings "may cause permanent damage to the device.
Symbol
VVDD VFB VSENSE PD TJ JA TSTG TL ESD DC Supply Voltage Input Voltage to FB Pin
Parameter
Min.
-0.3 -0.3
Max.
30 7.0 7.0 300 +150 141
Unit
V V V mW C C/W C C KV V
Input Voltage to Sense Pin Power Dissipation Operating Junction Temperature Thermal Resistance (Junction-to-Air) Storage Temperature Range Lead Temperature (Wave soldering, or IR 10 seconds) Electrostatic Discharge Capability, Human Body Model, JESD22-A114 Electrostatic Discharge Capability, Machine Model, JESD22-A115
-55
+150 +260 3.0 200
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Ambient Temperature
Min.
-40
Typ.
Max.
+105
Unit
C
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Electrical Characteristics
VDD=15V, TA=25C, unless otherwise noted.
Symbol
VDD Section VDD-OP VDD-ON VDD-OFF IDD-ST IDD-OP VDD-OVP tD-VDDOVP
Parameter
Continuous Operation Voltage Turn-on Threshold Voltage Turn-off Threshold Voltage Startup Current Operating Supply Current VDD Over-Voltage Protection Level VDD Over-Voltage Protection Debounce
Conditions
Min.
Typ.
Max.
22
Units
V V V A mA V s
15.5 10.5 VDD=VDD-ON - 0.1V VDD=15V, GATE with 1nF to GND Auto Restart Auto Restart 24
16.5 11.5 9 3.0 25 100
17.5 12.5 15 3.5 26
Feedback Input Section VFB-OPEN VFB-OL tD-OLP VFB-N VFB-G SG VOZ-OFF FB Output High Voltage FB Open-loop Trigger Level Delay Time of FB Pin Open-Loop Protection Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage Green-Mode Modulation Slope FB Threshold Voltage for Zero-Duty RI=95K 40 2.60 5 4.3 4.6 56 2.85 2.2 70 1.75 100 3.10 4.9 V V ms V V Hz/mV V
Current-Sense Section ZSENSE tPD VSTHFL VSTHVA tLEB DCYSAW Input Impedance Delay to Output Flat Threshold Voltage for Current Limit Valley Threshold Voltage for Current Limit Leading-Edge Blanking Time Duty Cycle of SAW Limit Maximum Duty Cycle 0.75 250 VDD=13.5 to 22V 10 40 55 1 0.80 310 45 0.85 370 100 K ns V V ns %
Oscillator Section fOSC tHOP fOSC-G fDV fDT Center Frequency Hopping Range Hopping Period Green-Mode Frequency Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation RI=95K RI=95K RI=95K VDD=13.5 to 22V TA=-20 to +85C 0 65 70 4.9 3.7 22 0.2 2.0 2 75 KHz ms KHz % %
Continued on the following page...
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Electrical Characteristics
VDD=15V, TA=25C, unless otherwise noted.
Symbol
Output Section DCYMAX VGATE-L VGATE-H tr tf VGATECLAMP
Parameter
Maximum Duty Cycle Output Voltage Low Output Voltage High Rising Time Falling Time Output Clamp Voltage
Conditions
Min.
70
Typ.
75
Max.
80 1.5
Units
% V V
VDD=15V, IO=20mA VDD=13.5V, IO=20mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=22V 16 8 120 65 17
ns ns 18 V
Frequency +4.9kHz 70 kHz -4.9kHz
+1.45kHz 20 kHz -1.45kHz
No Jitter if VFB < V FB-G
VOZ-OFF
VFB_G
VFB-N
FB
Figure 5. PWM Frequency
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Functional Description
SG5851A devices integrate many useful designs into one controller for low-power, switch-mode, power supplies. The following descriptions highlight some of the features of the SG5851A series.
Constant Output Power Limit
When the SENSE voltage across the sense resistor, RS, reaches the threshold voltage (~1.00V), the output GATE drive is turned off after propagation delay, tPD. This propagation delay introduces an additional current proportional to tPD*VIN/Lp. The propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltages result in larger additional currents. At high input line voltages, the output power limit is higher than at low input line voltages. To compensate for this output power limit variation across a wide AC input range, the threshold voltage is adjusted by adding a positive ramp. This ramp signal rises from 0.80V to 1.00V, then flattens out at 1.00V. A smaller threshold voltage forces the output GATE drive to terminate earlier. This reduces the total PWM turn-on time and makes the output power equal to that of lowline input. This proprietary internal compensation ensures a constant output power limit for a wide AC input voltage range (90VAC to 264VAC).
Startup Current
The startup current is only 9A, which allows a startup resistor with a high resistance and a low-wattage to supply the startup power for the controller. A 1.5M, 0.25W, startup resistor and a 10F/25V VDD hold-up capacitor are sufficient for an AC-to-DC power adapter with a wide input range (90VAC to 264VAC).
Operating Current
The operating current has been reduced to 3mA, which results in higher efficiency and reduces the VDD hold-up capacitance requirement.
Green-Mode Operation
The proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. On-time is limited to provide stronger protection against brownouts and abnormal conditions. The feedback current, which is sampled from the voltage feedback loop, is taken as the reference. Once the feedback current exceeds the threshold current, the switching frequency starts to decrease. Green mode dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using SG5851A meet even the strictest regulations regarding standby power consumption.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at 16.5V and 11.5V. During startup, the hold-up capacitor must be charged to 16.5V through the startup resistor to enable SG5851A. The hold-up capacitor continues to supply VDD until power can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 11.5V during the startup process. This UVLO hysteresis window ensures that the hold-up capacitor is adequate to supply VDD during startup.
Oscillator Operation
A resistor connected from the RI pin to ground generates a constant current source used to charge an internal capacitor. The charge time determines the internal clock speed and the switching frequency. Increasing the resistance reduces the amplitude of the input current and reduces the switching frequency. A 95k resistor, RI, results in a 13A constant current, II, and a 70kHz switching frequency. The relationship between RI and the switching frequency is:
fPWM = 6650 (kHz ) RI ( k)
Gate Output
The BiCMOS output stage is a fast totem-pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 17V Zener diode to protect power MOSFET transistors against undesired over-voltage gate signals.
Built-in Slope Compensation
The sensed voltage across the current sense resistor is used for current mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillations due to peak-current-mode control. The SG5851A has a synchronized, positively-sloped ramp built-in at each switching cycle. The slope of the ramp is: 0.36 x Duty (2)
Duty (max .)
(1)
The range of the oscillation frequency is designed to be within 50kHz ~ 80kHz.
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on spike occurs at the sense-resistor. To avoid premature termination of the switching pulse, a 310ns leadingedge blanking time is built in. Conventional RC filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot switch off the gate driver.
Noise Immunity
Noise from the current sense or the control signal can cause significant pulse-width jitter, particularly in continuous-conduction mode. While slope compensation helps alleviate these problems, further precautions should be taken. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the SG5851A, and increasing power MOS gate resistance improve performance.
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(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Typical Performance Characteristics
17.0
14.0
16.8
12.8
V DD-O F F (V )
-40 -25 -10 5 20 35 50 65 80 95 110 125
V DD-O N (V )
16.6
11.6
16.4
10.4
16.2
9.2
16.0
8.0
Temperature ( )
-40
-25
-10
5
Temperature ( )
20
35
50
65
80
95
110
125
Figure 6. VDD-ON vs. TA
Figure 7. VDD-OFF vs. TA
10.0
2.00
8.4
1.88
6.8
IDD-O P (mA)
-40 -25 -10 5 20 35 50 65 80 95 110 125
IDD-S T (A )
1.76
5.2
1.64
3.6
1.52
2.0
1.40
Temperature ( )
-40
-25
-10
5
Temperature ( )
20
35
50
65
80
95
110
125
Figure 8. IDD-ST vs. TA
Figure 9. IDD-OP vs. TA
70.0 69.2
76.0
75.2
68.4 67.6
D C Y M A X (%)
-40 -25 -10 5 20 35 50 65 80 95 110 125
fO S C (K H z)
74.4
73.6
66.8 66.0
72.8
72.0 -40 -25 -10 5
Temperature ( )
Temperature ( )
20
35
50
65
80
95
110
125
Figure 10. fOSC vs. TA
Figure 11. DCYMAX vs. TA
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Typical Performance Characteristics (Continued)
3.20
2.40
3.12
2.36
V F B -N (V )
3.04
V F B -G (V )
-40 -25 -10 5 20 35 50 65 80 95 110 125
2.32
2.96
2.28
2.88
2.24
2.80
2.20
Temperature ( )
-40
-25
-10
5
Temperature ( )
20
35
50
65
80
95
110
125
Figure 12. VFB-N vs. TA
Figure 13. VFB-G vs. TA
1.90
320
1.86
308
V O Z (V )
1.82
tLE B (ns )
296
1.78
284
272 1.74 260 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
1.70
Temperature ( )
Temperature ( )
Figure 14. VOZ vs. TA
Figure 15. tLEB vs. TA
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Mechanical Dimensions
9.83 9.00
6.67 6.096
8.255 7.61
5.08 MAX
3.683 3.20
7.62
0.33 MIN (0.56) 2.54
3.60 3.00 0.56 0.355 1.65 1.27
7.62
0.356 0.20 9.957 7.87
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BA B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994 E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 16. 8-Lead, PDIP, JEDEC MS-001, .300 Inch Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
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SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Mechanical Dimensions (Continued)
5.00 4.80 3.81
8 5
A
0.65
B
6.20 5.80
4.00 3.80
1 4
1.75
5.60
PIN ONE INDICATOR
(0.33)
1.27
0.25
M
CBA
1.27
LAND PATTERN RECOMMENDATION
0.25 0.10 1.75 MAX
C 0.10 0.51 0.33 0.50 x 45 0.25 C
SEE DETAIL A
0.25 0.19
OPTION A - BEVEL EDGE
R0.10 R0.10
GAGE PLANE
0.36
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13
8 0 0.90 0.406
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
Figure 17.
8-Lead, SOIC,JEDEC MS-012, .150 Inch Narrow Body
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
www.fairchildsemi.com 11
SG5851A -- Low-Cost, Green-Mode, PWM Controller for Flyback Converters
(c) 2008 Fairchild Semiconductor Corporation SG5851A * Rev. 1.0.0
www.fairchildsemi.com 12

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